The technology described herein relates to methods of and apparatus for scaling data arrays. In particular, the technology described herein relates to methods of and apparatus for scaling arrays of image data in a data processor.
A data array will comprise an array of data positions, with each data position having an associated data value or values, and have a given number of data positions in each dimension (e.g. in the horizontal and vertical directions) corresponding to the resolution of the array in each dimension. For example, an image may comprise a two-dimensional array of sampling positions (e.g. pixels), with each sampling position having an associated set of colour values (e.g. RGB or RGBα).
Scaling is performed on a data array to alter the horizontal and/or vertical size of the data array, for example to alter the resolution of an image. A number of different scaling methods are known including hardware methods. These methods differ in complexity, memory (RAM) requirements and their resultant image quality.
Some methods use only data from the sampling positions (e.g. pixels) of a single input line of the data array at a time to compute data for a single output sampling position, e.g. the nearest neighbour method. However, the image quality of the scaled image resulting from the output data array using such methods is generally poor.
More sophisticated methods use sampling positions from multiple input lines of the data array at a time to compute each output sampling position, e.g. a bilinear method uses sampling positions from two input lines at a time, a bicubic method uses sampling positions from four input lines at a time. The most frequently used method in present systems is polyphase filtering, which uses e.g. 6 or 8 input lines at a time depending on the number of taps used in the filter.
Scaling apparatus such as image scalers that are conventionally used in hardware solutions can have one of the two architectures shown in FIG. 1. Each architecture comprises two scaling stages—a horizontal scaling stage and a vertical scaling stage, each for performing appropriate scaling operations in the respective direction.
When a data array is to be scaled in the vertical scaling stage, each horizontal line of data is first written to a line memory, and is then processed as it is being read from the line memory. Thus, each of the two architectures shown in FIG. 1 requires one or more line memories for storing horizontal input lines of a data array to be processed in the vertical scaling stage. In order for a scaling apparatus to support horizontal scaling up to a maximum horizontal resolution of HS number of sampling points in the horizontal direction (e.g. HS number of pixels in the horizontal direction of an image), each line memory is required to be able to store an equivalent number of data entries corresponding to the maximum horizontal resolution, i.e. each line memory must be able to store HS number of data entries.
In the case of example (a), input image data is upscaled in the horizontal scaling stage to the maximum horizontal resolution HS. The horizontally upscaled image data is then written to the line memories, a predetermined number of horizontal lines at a time, to be read in the vertical scaling stage. In order for each line memory to accommodate a full horizontal line of the upscaled image data, each line memory must be able to store at least HS number of data entries. The number of horizontal lines to be read at a time depends on the vertical scaling method used. For example, if a 6-tap polyphase filtering method is used, then the vertical scaling stage requires 6 input lines at a time, and so 6 line memories are required.
In the case of example (b), the input image data is to be downscaled in the horizontal scaling stage from the maximum horizontal resolution HS. However, in order to support the vertical scaling stage, each line memory is again required to be able to store HS number of data entries for each input line of the data array to be read in the vertical scaling stage.
As shown in the examples in FIG. 1, in conventional image scalers, irrespective of their architecture, each line memory is always required to be able to handle a number of data entries equal to the number of sampling points corresponding to the maximum horizontal resolution supported by the image scaler.
It is desired to provide an improve method and apparatus for scaling data arrays.
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